1. Field of the Invention
The present invention relates generally to packaging substrates and methods for fabricating the same, and more particularly to a packaging substrate with an embedded photosensitive semiconductor chip and a method for fabricating the same.
2. Description of Related Art
Generally, photosensitive semiconductor chip packages are integrated with external devices such as printed circuit boards before being applied to various electronic products such as digital cameras, digital video cameras, optical mice and mobile phones. To fabricate a packaging substrate with a photosensitive semiconductor chip, a semiconductor chip with an image sensor such as a CMOS or CCD sensor is first mounted to a substrate and electrically connected to the substrate by solder wires, and then a light-permeable layer is mounted to cover the photosensitive chip, thereby allowing the photosensitive chip to receive image light so as to cause the product to operate. FIGS. 1A to 1D shows a method for fabricating a conventional packaging substrate with a photosensitive semiconductor chip.
As shown in FIG. 1A, a core board 10 is provided that has undergone hole drilling, metal plating, hole filling and a circuit forming process to obtain a finished inner structure with a plurality of conductive through holes 100. The core board 10 has a first surface 10a and an opposite second surface 10b, and a plurality of conductive pads 101 is formed on the first surface 10a and the second surface 10b. As shown in FIG. 1B, a semiconductor chip 11 having an active surface 11a and a non-active surface 11b is provided. The active surface 11a has a plurality of electrode pads 110 and a photosensitive portion 111. The semiconductor chip 11 is mounted to the first surface 10a of the core board 10 via its non-active surface 11b. As shown in FIG. 1C, the electrode pads 110 of the semiconductor chip are electrically connected to the conductive pads 101 on the first surface 10a of the core board 10 through a plurality of conductive wires 12 made of gold, and a dam 13 is disposed on the core board 10 around the semiconductor chip 11 and the conductive wires 12. As shown in FIG. 1D, a light-permeable layer 14 is mounted on the dam 13 to seal the semiconductor chip 11. The dam prevents the light-permeable layer 14 from coming in contact with the semiconductor chip 11. The inner space constituted by the dam 13 and the light-permeable layer 14 keeps out contaminants to protect the semiconductor chip 11. Therein, the light-permeable layer 14 is made of glass so as to allow light to penetrate therethrough and reach the photosensitive portion 111. Further, a plurality of solder balls 15 is mounted to the conductive pads 101 on the second surface 10b of the core board 10, thereby allowing the package to be connected to a printed circuit board.
However, in the conventional package structure, the inner portion of the core board 10 needs to be processed first so as to form the conductive through holes 100, thereby complicating the fabrication process.
Further, the core board 10 must have a certain thickness for maintaining stability of the photosensitive portion 111 so as to prevent warpage of the core board 10 due to pressure exerted by the dam 13 on the edges of the core board 10, and also to provide alignment of the light-permeable layer 14 such that it is parallel with the photosensitive portion 111 so as to reduce signal distortion. As such, the resultant size of the packaging substrate cannot optimally meet the requirements for a light-weighted, compact-sized packaging substrate. Meanwhile, the dam 13 formed on the core board 10 needs to have a height of 50-200 um, and the height evenness thereof is difficult to control, which accordingly increases the difficulty of fabrication.
Furthermore, space needs to be reserved on the core board 10 for disposing of the dam 13, thereby increasing the overall planar size of the packaging substrate. In addition, the dam 13 must be higher than the highest point of the conductive wires 12, thereby increasing the overall height of the packaging substrate.
Therefore, during the fabrication process, the area and height of the conventional packaging substrate have to be increased. As a result, the packaging substrate is too large to be integrated into minimized electronic products.
Accordingly, overcoming the above-described drawbacks is a critical concern.